Envié una solicitud electrónica. Acudí a una entrevista en Wipro
Entrevista
Strong hands-on experience in RTL coding using VHDL/Verilog HDL, Simulations, working knowledge in Digital circuit design, high speed interface circuits, system integration testing and Lab testing. Responsible for complete product development and deliverables, right from Architecture and spec finalization to FPGA proto-type targeted on Xilinx. Kintex 7, including Architecture, Functional Specifications Documentation,RTL Design documentation, RTL, STA, Simulations, Synthesis, Good Understanding of ASIC Design flow and Customer Support.
Solicité el puesto a través de un captador. El proceso duró 1 semana. Acudí a una entrevista en Wipro
Entrevista
Run through the basic hardware level questions on signal integrity and timing violation checks.
basic questions on the previous projects
Dynamic memory allocation program
Next round was Managerial level where he tried to check the problem solving skills
Envié una solicitud electrónica. El proceso duró 1 día. Acudí a una entrevista en Wipro (Bengaluru) en feb 2014
Entrevista
Nice calm and friendly staff. Did give me my own time to answer their question in detail. Was appreciative of what I had done earlier in my career too. They mostly covered some of the practical things I did in past and few theoretical questions too
Preguntas de entrevista [1]
Pregunta 1
Mostly fundamental questions on HW design and validation