ID: RTL-2 Description We have multiple open positions in our RTL team and we're looking for individuals with either a strong RTL or a strong architecture……
You will develop, enhance, and maintain block- and chip-level PD flows, debug timing, power, congestion, and physical verification issues, and work closely with……
To do this, you will engage in design decisions across disciplines and teams (hardware, firmware) and will analyze requirements and designs to detect areas of……
In this role, you will take full ownership of the implementation process—from RTL to GDSII—utilizing some of the industry's most advanced technology nodes.…
Additionally, you will have the opportunity to work on the analysis of the existing design, identification of reusable blocks, adaptation of the hardware……
You will work within the SoC Top Team, work closely with other teams’ highly skilled engineers to create efficient and high-performance SoC Top designs that are……
Flexible work schedules, competitive pay, a highly learning environment, and opportunities for advancement. Experience with Timing and Timings Constraints.…
Your expertise in PCIe integration and/or design will be essential to create the efficient, high-performance subsystems vital for modern semiconductor designs.…
In this role, you will take full ownership of the implementation process at the top level of an enormous design—from RTL to GDSII—utilizing some of the……
We promote good physical and mental health, with a Health insurance, Fresh fruit in the office and the possibility of sharing the cost of bicycle transport or……
Given the complexity of the task in hand, this work requires skilled FPGA engineers with experience in designing and mapping logical resources in very large……
With the help of your mentor and your team, you will be responsible to define, implement and verify designs implemented in RTL VHDL in any of our working fields……
Architect, support and deliver quality digital solutions, from RTL design using System Verilog, through Formal and CDC analysis, defining synthesis/timing……
We promote good physical and mental health, with a Health insurance, Fresh fruit in the office and the possibility of sharing the cost of bicycle transport or……
Experience in synthesis, DFT and supervision of timing driven Place and Route and UVM Verification background and experience in Video/Audio communication and……
B.Tech / M.Tech . in EE/ECE with 10+ years of experience in digital implementation. Should be able to step in and take responsibility of implementation tasks……
In this role, you will lead the development of high-performance middleware and sophisticated tooling that allows our hardware and software teams to iterate in……
We have multiple open positions in our RTL team and we're looking for individuals with either a strong RTL or a strong architecture/microarchitecture background interested in working in several areas of a RISC-V design for an advanced technology node. In particular, areas of focus will be the processor pipeline, d-cache, i-cache, the l2-pipeline and a custom memory controller. We believe in very “vertical” engineers that fully understand the problem to be solved and can take it down to RTL level.