Round 1: resume projects(in detail, my role and contribution), basics like cmos inverter, cmos nand gate, current mirror, blocking vs non blocking, explained a design and asked for the verilog code of it. Round 2: Linux, Python regular expressions. I could not answer linux and python questions so he asked me to explain the logic instead of writing the code. 45 mins break Round 3: She wanted to know how well I was aware of Analog design basics. Virtual interface, inertial vs transport delay, how to debug errors in simulator, asked about the tools I mentioned in the resume. Round 4: Lots of verilog, digital basics, gave a black box and asked how can I verify it if there were two sub modules one analog and one digital. Clock gating and how can we get clock gating, basic building block of counters, inertial vs transport delay, verilog vs SV, . Round 5: It was more like a discussion on a verification plan with analog and digital modules. Round 6: With the manager, behavioral questions, how do you deal with stress, how did you manage people in your previous job, how do you deal with people who always comment, why do you want to get hired for this role even though you do not have enough skills.