Envié una solicitud electrónica. El proceso duró 3 semanas. Acudí a una entrevista en Qualcomm (Santa Clara, CA) en mar 2018
Entrevista
On-site and telephonic. Both interviews went well and HR even contact about offer. But came back after 3 weeks saying they are not going to go ahead. They did even give a proper reason and they took so long to even respond to emails.
Preguntas de entrevista [2]
Pregunta 1
Difference between m sequencer and p sequencer in uvm?
Envié una solicitud electrónica. Acudí a una entrevista en Qualcomm
Entrevista
Process was good. Started with basic questions and then covered entire verification flow. Some basic questions on verilog, system verilog, UVM.
Questions related to your previous project. DIfferent types of FSM and differences.
Preguntas de entrevista [1]
Pregunta 1
FSM for sequence detector.
Verification environment.
Verilog programming.
Solicité el puesto por otro medio. El proceso duró 2 días. Acudí a una entrevista en Qualcomm (Bengaluru) en abr 2024
Entrevista
The Interview was setup for 3 hours.
One person took interview for ~1 hour and then the other person for 1 hour and the interview is done.
They asked me about my past experience and past projects.
They asked me what are my strong subjects and started interview on the same.
Preguntas de entrevista [1]
Pregunta 1
What is deep copy and shallow copy in System Verilog?
Can you tell about sequencer in UVM and what is the use of it?
What is virtual interface and why it is used?
Gave a Constraint and asked what will be the randomised values.
Asked to write an assertion for a given scenario
Asked to write a constraint such that it will generate even and odd numbers in sequence.
Solicité el puesto a través de la recomendación de un empleado. Acudí a una entrevista en Qualcomm (Bengaluru) en jun 2021
Entrevista
The interview process was smooth had 5 hrs of process and it went very well they have asked all the previous experience and all the sv UVM related main topics
