Solicité el puesto por otro medio. El proceso duró 1 día. Acudí a una entrevista en Shiva (Bengaluru) en may 2024
Entrevista
1st round Written test-Test is based SV and UVM
2nd round based System Verilog and UVM and Assertions
3rd round based Project and UVM and Constraints, Functional coverage and Code coverage.
Preguntas de entrevista [1]
Pregunta 1
What is the difference between function new and create constructor
in design verfication there are 3 rounds 1st one is written and 2nd techinical interview they ask about basic of digital design , verilog, system verilog, basic of uvm and 3rd is hr round
2 rounds of interview technical and hr round in technical round they have asked basic questions I tried to answer every question some I even don't know that topic exist
Preguntas de entrevista [1]
Pregunta 1
Questions like blocking assignment and non blocking assignment difference