Envié una solicitud electrónica. Acudí a una entrevista en Qualcomm (Cork) en may 2025
Entrevista
SV/UVM theory, RTL problem solving and test plan, OOP thorough knowledge, CRT and coverage. Some design qns.
2 tech rounds, 1 HR. May have a director or extra round post-offer.
Preguntas de entrevista [1]
Pregunta 1
Write a constraint for an address and data under three conditions: unique, for each of an array, equality.
Solicité el puesto a través de la recomendación de un empleado. Acudí a una entrevista en Qualcomm en abr 2024
Entrevista
They asked me a riddle. I was tested on various digital design concepts, some C++, writing SystemVerilog concepts based on simulation output, general verification concepts (no UVM yet). i was also asked about my long term goals and to what extent i understand the company's work.
Preguntas de entrevista [1]
Pregunta 1
I can't say exactly but one SystemVerilog question was to implement a finite state machine given a certain output. Review sequence detectors.
Envié una solicitud electrónica. Acudí a una entrevista en Qualcomm (Dublín, Dublín) en mar 2021
Entrevista
1st round was technical interview, I applied for the role two days back and got shotlisted very quick. I applied through Linkedln. The interviewers were very gentle and the hiring process was very smooth.