The process was made very comfortable with 2 rounds and basic VLSI and SystemVerilog questions. CMOS sizing, circuits like NAND and NOR, realizing logical functions using gates were some VLSI basics. Got in through a referral, so make aure you reach out to as many employees as possible. SystemVerilog questions involved blocking and non-blocking operators, their usage and differences, Verilog vs SystemVerilog language differences and SystemVerilog related projcect discussions.

It was a good interview process . The HR was very good and supporting. The team who took interview was upto the point when it came to asking the questions.