the interview process consist of 1 take home test to design a system in Verilog and verify the design. Then if you pass the take home test there is 1 round of phone screening where you will be asked about FPGA components, OS, memory management, pointers, verification, paging... If you pass the second round, you have to take the live coding interview which is a very simple Python programming test. Don't overthink on the problem, it is NOT supposed to be LC hard/medium.
