First the screening round happened. Then followed up with first round of the interview. And then never heard anything from them back. Chasing the HR team also did not gave any responses.

this is campus interview , starting asking me the reklevant coursework i have in my curriculum and breif intro about them ,like low power vlsi design -what they have taught us and asked about how dynamic,static ,short circuit power dissipation happens in an inverter . ,how to reduce them , power reduction techniques at logic level ,architecture level ,after this gone for verilog , basic bolcking and non blocking ,traffic signal using delay ,projects on digital design using verilog or system verilog