Solicité el puesto a través de un captador. Acudí a una entrevista en Apple (San Jose, CA) en jul 2016
Entrevista
General questions with digital design. Some areas included Clock domain crossing, affect of voltage, temperature on mestability of flop, FIFO, implementation of dual port RAM using single port RAM. what are the different techniques to accomplish this like doubling the clock frequency, memory banking or doubling the amount of data stored in the RAM.
Had a HR screening first and then went to 1st round of technical interview. The HR interview is short and happened over phone call. The technical interview happens over webex.
Preguntas de entrevista [1]
Pregunta 1
HR: Location preferences, availability, GPA
Technical: CDC, Metastability in digital circuit, State Diagram of Sequence Detector, Clock and Power Gating.
It was good everyone were easy to talk to and helpful when stuck. Position experience. Questions were medium difficulty. It was related to asic design. Had an interview screening then panel interview
Solicité el puesto a través de la recomendación de un empleado. Acudí a una entrevista en Apple
Entrevista
Contacted by HR and had a brief phone screen to talk about past coursework and interest. 1st round technical interview on timing constraints, bus protocols, and verilog coding. Also digged into projects on resume.