Envié una solicitud electrónica. El proceso duró 2 días. Acudí a una entrevista en Altera (San Jose, CA) en dic 2014
Entrevista
The work will be related to primarily with the design and verification engineer on block-level and subsystem-level verification, with possible exposure to some design and synthesis work as well. So the interview for me was more about my academic projects which involved in Designing of 5 stage MIPS processor and design of DMA controller and High performance Multiplier.