El proceso duró 1 día. Acudí a una entrevista en AMD (Indianola, MS) en ago 2025
Entrevista
First step: a phone contact (probably screening) with recruiter or hiring manager.
Then a first technical interview round.
Then two more technical rounds (so a total of at least 3 technical rounds) before HR.i did not pass the first technical round
Preguntas de entrevista [1]
Pregunta 1
ou have an asynchronous FIFO (in RTL) to transfer data between two clock domains (Clk_A and Clk_B). Describe how you would verify this FIFO. What testbench components would you build? What corner cases would you include? How would you write assertions? How would you verify that metastability / synchronization issues are handled?
Envié una solicitud electrónica. El proceso duró 1 semana. Acudí a una entrevista en AMD (Toronto, ON) en oct 2016
Entrevista
Applied online and interviewed with 2 people on campus. Simple Verilog/Digital Circuit/C++ questions. Should be able to answer them all after second year in university. Interviewers were kind and friendly, gave hints when stuck on problems. Also gave detailed descriptions about the job and what they do. Waiting for offer results.
Envié una solicitud electrónica. Acudí a una entrevista en AMD (Markham, ON) en ago 2016
Entrevista
Approximately 4 hours in length. Multiple interviewers in 1 room. Asked about past experience on resume and furthermore conveyed through whiteboard in detail. Pen and paper design problems, data structures and algorithms, combinational and sequential circuits, etc.
